Events at Department of Energy Technology

PhD defence by Saeed Golestan on Modeling, Analysing, and Designing Advanced Synchronization Techniques for Power Converters

Time

30.04.2018 kl. 13.00 - 30.04.2018 kl. 16.00

Description

Saeed Golestan, Department of Energy Technology, will defend the thesis "Modeling, Analysing, and Designing Advanced Synchronization Techniques for Power Converters".

TITLE

Modeling, Analysing, and Designing Advanced Synchronization Techniques for Power Converters

PHD DEFENDANT

Saeed Golestan

SUPERVISOR

Professor Josep Guerrero 

MODERATOR

Associate Professor Sanjay K. Chaudhary 

OPPONENTS

Associate Professor Tamas Kerekes, Dept. of Energy Technology, Aalborg University (Chairman)
Professor Nimrod Vazquez, Instituto Tecnologico de Celaya, Mexico
Professor Francisco Neves, Federal University of Pernambuco, Brazil

ABSTRACT

Synchronization, in simple words, can be defined as the procedure of coordinating a generator (here, a power converter with its DC source) and the main grid so that they are able to effectively work in parallel. This procedure most often involves extracting the grid voltage parameters (i.e., phase, frequency, and amplitude). In this case, it can be carried out using phase-locked loops (PLLs) and frequency-locked loops (FLLs), which are closed-loop synchronization techniques, or in an open-loop manner using different filtering techniques.

The main challenge that all synchronization techniques regardless of their nature are facing with is growing power quality issues (i.e., the presence of harmonics, DC offset, unbalance, amplitude sag and swell, etc.) in the grid voltage. These disturbances, which are mainly attributable to the high penetration of distributed generation systems and nonlinear power electronics-based loads in the distribution system, adversely affect the synchronization technique performance. To deal with this challenge, some research efforts have been made in the literature. The main objective of this dissertation is to provide a critical analysis of these efforts and make further contributions to the field by designing more advanced synchronization techniques. These contributions cover all categories of synchronization techniques, i.e., PLLs, FLLs, and open-loop techniques, as explained below.

Contributions to the PLL field are as follows. First, a comprehensive review of recent advances in designing single-phase and three-phase PLLs is conducted. This review is highly beneficial for both researchers and engineers as it highlights the pros and cons of different PLLs. Second, the small-signal modeling of a large number of advanced single-phase and three-phase PLLs are conducted. These models make the stability assessment, performance analysis, and tuning the control parameters of these PLLs straightforward and effective. Third, several advanced PLLs are designed. Roughly speaking, these PLLs improve the speed/accuracy tradeoff of the state-of-the-art PLLs while maintaining simplicity. Fourth, a PLL-based signal decomposition technique is developed which in addition to detecting the grid voltage fundamental phase/frequency/amplitude, can extract an arbitrary number of grid voltage harmonics with a fast dynamic response and high accuracy. Finally, a PLL-based controller for three-phase grid-connected power converters is designed. This controller, which is realized by adding a positive feedback loop to a conventional synchronous reference frame PLL (SRF-PLL), merges the controller and synchronization units into a single part and guarantees a zero current tracking error for the grid-tied converter under nominal and off-nominal frequencies.

Regarding FLLs, the following contributions are made in this thesis. First, it is demonstrated how the small-signal modeling of typical and advanced single-phase and three-phase FLLs should be conducted. Thanks to these models, the FLLs tuning and stability analysis can now be easily and effectively carried out. Second, a performance comparison among some advanced FLLs is conducted to better understand their properties. Third, the concept of in-loop filter for designing more effective FLLs is introduced. Fourth, it is proved that FLLs are mathematically equivalent to PLLs. It means that FLLs and PLL are practically the same control systems that are implemented in different reference frames. Finally, through establishing a resemblance between the average model of a single-phase grid-connected converter with a proportional-resonant (PR) current controller and a typical single-phase FLL, it is demonstrated that the frequency estimation capability can be easily added to the resonant term of the PR controller. In this way, the need for a separate synchronization unit (like a PLL) is removed, which leads to a simpler and more compact structure.

Some contributions to open-loop synchronization (OLS) techniques are also made in this dissertation. First, a true OLS technique for three-phase systems is designed, which does not use any feedback in its structure and works effectively under frequency drifts without requiring any knowledge of the grid frequency. This synchronization technique benefits from a low computational burden and offers a fast dynamic response and a high customizability to deal with different grid scenarios. Second, a moving average filter-based OLS technique for single-phase applications is designed. This synchronization method offers interesting advantages such as the zero average phase/frequency/amplitude error under nominal/off-nominal frequencies, a complete DC offset rejection ability, a complete (effective) filtering of the grid voltage harmonics under a nominal (off-nominal) frequency, and a fast dynamic response (a settling time less than 1.5 cycles).

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PhD defence by Saeed Golestan on Modeling, Analysing, and Designing Advanced Synchronization Techniques for Power Converters

ALL ARE WELCOME. THE DEFENCE WILL BE IN ENGLISH.

AFTER THE DEFENCE THERE WILL BE AN INFORMAL RECEPTION AT PONTOPPIDANSTRAEDE 111 IN ThE COFFEE ROOM.

 

Host

Department of Energy Technology

Address

Pontoppidanstræde 111, auditorium 1.177